The High Performance Interconnect Architecture for Supercomputers

In this paper, we introduce the design of an advanced high-performance interconnect architecture for supercomputers. first part consider generation Angara (Angara G1). The is based on router ASIC, which supports a 4D torus topology, deterministic and adaptive routing, has hardware support RDMA technology. interface with processor unit PCI Express. G1 extremely low communication latency 850 ns using MPI library, as well link bandwidth 75 Gbps. present scalability performance results considered application problems supercomputers equipped interconnect. second research experience (G2). G2 6D zone routing algorithms, low-level operations including acknowledgments notifications. includes exceptions, counters, SR-IOV virtualization. A planned in form factor 32-port switch QSFP-DD connectors two-port profile Express adapter. switches can be combined to topology. We show evaluation experimental FPGA prototype, confirm possibility implementing proposed high architecture.